Overclocking Athlon 64 Part 1
As we know, overclocking involves increasing either the clock ratio of the cpu and/or raising the fsb/htt speed. For this review, I will be overclocking an Athlon 64 2800+ and will be focusing on bus manipulation more than anything else. These chips are multiplier locked upwards. This basically means, in the case of this chip, that I am limited to 9xHTT and downward.
The motherboard I will be using is the DFI Lanparty UT Nforce 3 250gb. This motherboard is regarded as the best socket 754 overclocking board there is. With the aid of a custom bios, an OCZ DDR booster (supplied by OCZ) and some OCZ PC3200 Enhanced Latency Platinum Limited edition ram (supplied by OCZ), I am well on the way to see the overclockability of this platform. My CPU cooling is a Thermalright XP 90 heat sink (supplied by Thermalright) and a 92mm Fan. Both the XP 90 and the IHS of the chip were covered with a thin even layer of Arctic Silver 5.
The bios of this board is the most comprehensive I have ever seen. It can be intimidating at first. I was lucky enough to get my hands on a custom bios (from www.ocforums.com ) that included Memtest 86+. Memtest is invaluable when overclocking and is used to test ram stability before booting into windows as well as determining your ram's maximum stable timings. My OCZ ram has Winbond BH-6 ics. For those of you unfamiliar with this ram, it loves volts. It performs best at 3.0v+, while retaining tight timings 2-2-2-10. The settings I used for the ram were:
Dram Frequency Set(Mhz)= 200(Mhz)(1/01)
Command Per Clock(CPC)= Enable(1T), ( This is the delay between Chip Select (CS) or when a IC is selected and the time commands can be issued to the IC. . 1T is set for best performance and overclocking with the exception of some double sided ram, most notably winbond BH-5/6)
Cas Latency Control(tCL)= 2 ( CAS is Column Address Strobe or Column Address Select. CAS controls the amount of time (in cycles (2, 2.5,& 3) between receiving a command and acting on that command. 2 yields the best performance, but, unless you have either Winbond BH-5, or BH-6, it is unlikely you will beable to reach you maximum overclock at CAS2. CAS3 is usually yeilds the best stablility/overclock.)
RAS# to CAS# delay(tRCD)= 2 (tRCD is the cycle time between the first stage in memory access, the row strobe, and the second stage. 2 yields the best performance, and 4-5(5 is usually overkill) yeilds the best overclock. Most rams will not be able to use 2, and reach there max OC.)
Min RAS# active timing(tRAS)=10 (Also known as Active to Precharge Delay, this is the time between receiving a request for data electronically on the pins of a memory module and then initiating RAS to start the actual retrieval of data. This is a very debated timing. Some may argue that 00, 05, or 10 is the faster/most stable, but I really think there isnt a right anwser for this one. It all depends on your ram. But, if you need a good starting point, usually most/all rams can achieve their max OC on 10 tRAS, even if one of the other setting is faster. )
Row Precharge timing(tRP)= 2 (Also known as RAS Precharge) is the amount of time it takes for memory to terminate the access in one row and begin another. To put it simply, after data is set to the pins and activates tRAS, then RAS, tRCD, and CAS; the memory needs to terminate its current row and start all over at tRAS. 2 yields the best performance, and 4-5(5 is usually overkill) yields the best overclock. Most rams will not be able to use 2, and reach there max OC )
Row Cycle Time(tRC)= 9 tRC refers to the SDRAM Row Cycle Time, which determines the minimum number of clock cycles a memory row takes to complete a full cycle, from row activation up to the precharging of the active row. 7 yields the best performance, 15-17(i think 17 is overkill) yields the best stability/overclock. I would start at 15, and work your way down from there. Also, 7 is usually much to tight, for most ram.)
Row Refresh cyc time(tRFC)= 12
Row to Row Delay(also called Ras to Ras delay)(tRRD)=00, 02 also worked well
Write Recovery Time(tWR)= 2
Write to read Delay(tWTR)= 1
Read to Write delay(tRTW)=1
Refresh Period(tREF)=3120, and 3072 also worked well
Write CAS# Latency(tWCL)= 1
DQS skew Contro= Increase Skew
DQS Skew Value= 43
DRAM Drive Strength= Level 1(or Level 2 for some configurations)
Max Asynce lantency=7ns
Read Preamble time=5ns
Idle Cycle Limit= 016
Dynamic Counter= Enable
R/W Queue Bypass=16x
Bypass Max= 07x
32 byte Granulation=Disable(8burst)
(taken from www.ocforums.com) |
